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FEATURES Low Offset Voltage: 50 V Max Very Low Offset Voltage Drift: 0.3 V/ C Max Low Noise: 0.12 V p-p (0.1 Hz to 10 Hz) Excellent Output Drive: 10 V at 50 mA Capacitive Load Stability: to 1 F Gain Range: 0.1 to 10,000 Excellent Linearity: 16-Bit at G = 1000 High CMR: 125 dB min (G = 1000) Low Bias Current: 4 nA Max May Be Configured as a Precision Op Amp Output-Stage Thermal Shutdown Available in Die Form GENERAL DESCRIPTION
Low Noise, Precision Instrumentation Amplifier AMP01*
PIN CONFIGURATIONS 18-Lead Cerdip
RG 1 RG 2 -IN 3 VOOS NULL 4 VOOS NULL 5 TEST PIN* 6 SENSE 7 REFERENCE 8 OUTPUT 9
18 17 16 15 14 13 12 11
+IN VIOS NULL VIOS NULL RS RS +VOP V+ V- -VOP
AMP01
10
The AMP01 is a monolithic instrumentation amplifier designed for high-precision data acquisition and instrumentation applications. The design combines the conventional features of an instrumentation amplifier with a high current output stage. The output remains stable with high capacitance loads (1 F), a unique ability for an instrumentation amplifier. Consequently, the AMP01 can amplify low level signals for transmission through long cables without requiring an output buffer. The output stage may be configured as a voltage or current generator. Input offset voltage is very low (20 V), which generally eliminates the external null potentiometer. Temperature changes have minimal effect on offset; TCVIOS is typically 0.15 V/C. Excellent low-frequency noise performance is achieved with a minimal compromise on input protection. Bias current is very low, less than 10 nA over the military temperature range. High common-mode rejection of 130 dB, 16-bit linearity at a gain of 1000, and 50 mA peak output current are achievable simultaneously. This combination takes the instrumentation amplifier one step further towards the ideal amplifier. AC performance complements the superb dc specifications. The AMP01 slews at 4.5 V/s into capacitive loads of up to 15 nF, settles in 50 s to 0.01% at a gain of 1000, and boasts a healthy 26 MHz gain-bandwidth product. These features make the AMP01 ideal for high speed data acquisition systems. Gain is set by the ratio of two external resistors over a range of 0.1 to 10,000. A very low gain temperature coefficient of 10 ppm/C is achievable over the whole gain range. Output voltage swing is guaranteed with three load resistances; 50 , 500 , and 2 k. Loaded with 500 , the output delivers 13.0 V minimum. A thermal shutdown circuit prevents destruction of the output transistors during overload conditions. The AMP01 can also be configured as a high performance operational amplifier. In many applications, the AMP01 can be used in place of op amp/power-buffer combinations. REV. D
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
TOP VIEW (Not to Scale) *MAKE NO ELECTRICAL CONNECTION
AMP01 BTC/883 28-Terminal LCC
VIOS NULL
+IN
-IN
NC
1
4
RG
3
RG
2
28 27 26
NC
NC 5 VOOS NULL 6 NC 7 VOOS NULL 8 NC 9 TEST PIN* 10 NC 11
12 13 14 15 16 17 18
25 24
VIOS NULL NC RS RS +VOP NC V+
AMP01
TOP VIEW (Not to Scale)
23 22 21 20 19
REF
SENSE
OUT
NC
NC = NO CONNECT
*MAKE NO ELECTRICAL CONNECTION
20-Lead SOIC
RG TEST PIN* -IN VOOS NULL VOOS NULL TEST PIN* SENSE REFERENCE OUTPUT
1 2 3 4 5 6 20 19 18 17
-VOP
NC
16 13 12 11
RG TEST PIN* +IN VIOS NULL VIOS NULL
AMP01
TOP VIEW 15 R S (Not to Scale) 14 RS 7
8 9
-VOP 10
*MAKE NO ELECTRICAL CONNECTION
*Protected under U.S. Patent Numbers 4,471,321 and 4,503,381. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 World Wide Web Site: http://www.analog.com Fax: 781/326-8703 (c) Analog Devices, Inc., 1999
V- +VOP V+ V-
AMP01-SPECIFICATIONS
ELECTRICAL CHARACTERISTICS (@ V =
S
15 V, RS = 10 k , RL = 2 k , TA = +25 C, unless otherwise noted)
Min AMP01A Typ Max 20 40 0.15 1 3 120 110 95 75 120 110 95 75 105 90 70 50 105 90 70 50 20 130 130 110 90 130 130 110 90 125 105 85 65 125 105 85 85 6 100 1 4 40 0.2 0.5 3 1 10 20 4 10 1.0 3.0 50 80 0.3 3 6 50 110 100 90 70 110 100 90 70 105 90 70 50 105 90 70 50 AMP01B Min Typ Max 40 60 0.3 2 6 50 120 120 100 80 120 120 100 80 115 95 75 60 115 95 75 60 6 100 2 6 50 0.5 1.0 5 1 10 20 6 15 2.0 6.0 100 150 1.0 6 10 120 Units V V V/C mV mV V/C dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB mV mV nA nA pA/C nA nA pA/C G G G V V dB dB dB dB dB dB dB dB
Parameter OFFSET VOLTAGE Input Offset Voltage Input Offset Voltage Drift Output Offset Voltage Output Offset Voltage Drift Offset Referred to Input vs. Positive Supply V+ = +5 V to +15 V
Symbol VIOS TCVIOS VOOS TCVOOS PSR
Conditions TA = +25C -55C TA +125C -55C TA +125C TA = +25C -55C TA +125C RG = -55C TA +125C G = 1000 G = 100 G = 10 G=1 -55C TA +125C G = 1000 G = 100 G = 10 G=1 G = 1000 G = 100 G = 10 G=1 -55C TA +125C G = 1000 G = 100 G = 10 G=1
Offset Referred to Input vs. Negative Supply V- = -5 V to -15 V
PSR
Input Offset Voltage Trim Range Output Offset Voltage Trim Range INPUT CURRENT Input Bias Current Input Bias Current Drift Input Offset Current Input Offset Current Drift INPUT Input Resistance Input Voltage Range Common-Mode Rejection IB TCIB IOS TCIOS RIN IVR CMR
VS = 4.5 V to 18 V 1 VS = 4.5 V to 18 V 1 TA = +25C -55C TA +125C -55C TA +125C TA = +25C -55C TA +125C -55C TA +125C Differential, G = 1000 Differential, G 100 Common Mode, G = 1000 TA = +25C2 -55C TA +125C VCM = 10 V, 1 k Source Imbalance G = 1000 G = 100 G = 10 G=1 -55C TA +125C G = 1000 G = 100 G = 10 G=1
10.5 10.0 125 120 100 85 120 115 95 80
10.5 10.0 115 110 95 75 110 105 90 75
130 130 120 100 125 125 115 95
125 125 110 90 120 120 105 90
NOTES 1 VIOS and V OOS nulling has minimal affect on TCV IOS and TCV OOS respectively. 2 Refer to section on common-mode rejection. Specifications subject to change without notice.
-2-
REV. D
AMP01 ELECTRICAL CHARACTERISTICS grades, 0 C T +70 C for G grade, unless otherwise noted)
A
(@ VS =
15 V, RS = 10 k , RL = 2 k , TA = +25 C, -25 C TA +85 C for E, F
AMP01E Typ Max 20 40 0.15 1 3 120 110 95 75 120 110 95 75 110 95 75 55 110 95 75 55 20 130 130 110 90 130 130 110 90 125 105 85 65 125 105 85 85 6 100 1 4 40 0.2 0.5 3 1 10 20 4 10 1.0 3.0 50 80 0.3 3 6 100 110 100 90 70 110 100 90 70 105 90 70 50 105 90 70 50 AMP01F/G Min Typ Max 40 60 0.3 2 6 50 120 120 100 80 120 120 100 80 115 95 75 60 115 95 75 60 6 100 2 6 50 0.5 1.0 5 1 10 20 6 15 2.0 6.0 100 150 1.0 6 10 120
Parameter OFFSET VOLTAGE Input Offset Voltage Input Offset Voltage Drift Output Offset Voltage Output Offset Voltage Drift Offset Referred to Input vs. Positive Supply V+ = +5 V to +15 V
Symbol VIOS TCVIOS VOOS TCVOOS PSR
Conditions TA = +25C TMIN TA TMAX TMIN TA TMAX1 TA = +25C TMIN TA TMAX R G = 1 TMIN TA TMAX G = 1000 G = 100 G = 10 G=1 TMIN TA TMAX G = 1000 G = 100 G = 10 G=1 G = 1000 G = 100 G = 10 G=1 TMIN TA TMAX G = 1000 G = 100 G = 10 G=1
Min
Units V V V/C mV mV V/C dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB mV mV mV mV pA/C mV mV pA/C G G G V V dB dB dB dB dB dB dB dB
Offset Referred to Input vs. Negative Supply V- = -5 V to -15 V
PSR
Input Offset Voltage Trim Range Output Offset Voltage Trim Range INPUT CURRENT Input Bias Current Input Bias Current Drift Input Offset Current Input Offset Current Drift INPUT Input Resistance Input Voltage Range Common-Mode Rejection
VS = 4.5 V to 18 V 2 VS = 4.5 V to 18 V 2 IB TCIB IOS TCIOS RIN IVR CMR TA = +25C TMIN TA TMAX TMIN TA TMAX TA = +25C TMIN TA TMAX TMIN TA TMAX Differential, G = 1000 Differential, G 100 Common Mode, G = 1000 TA = +25C3 TMIN TA TMAX VCM = 10 V, 1 k Source Imbalance G = 1000 G = 100 G = 10 G=1 TMIN TA TMAX G = 1000 G = 100 G = 10 G=1
10.5 10.0 125 120 100 85 120 115 95 80
10.5 10.0 115 110 95 75 110 105 90 75
130 130 120 100 125 125 115 95
125 125 110 90 120 120 105 90
NOTES 1 Sample tested. 2 VIOS and V OOS nulling has minimal affect on TCVIOS and TCVOOS , respectively. 3 Refer to section on common-mode rejection. Specifications subject to change without notice.
REV. D
-3-
AMP01 ELECTRICAL CHARACTERISTICS (@ V =
S
15 V, RS = 10 k , RL = 2 k , TA = +25 C, unless otherwise noted)
Min AMP01A/E Typ Max Min AMP01B/F/G Typ Max Units
Parameter GAIN Gain Equation Accuracy
Symbol Conditions
20 x RS RG
G=
0.3
0.6
0.5
0.8
%
Accuracy Measured from G = 1 to 1000 Gain Range Nonlinearity G G = 10001 G = 1001 G = 101 G = 11 1 G 10001, 2 RL = 2 k RL = 500 RL = 50 RL = 2 k Over Temp. RL = 500 3 Output-to-Ground Short Output-to-Ground Short 1 G 1000 No Oscillations1 Junction Temperature en en en en en in en p-p en p-p en p-p en p-p en p-p in p-p fO = 1 kHz G = 1000 G = 100 G = 10 G=1 fO = 1 kHz, G = 1000 0.1 Hz to 10 Hz G = 1000 G = 100 G = 10 G=1 0.1 Hz to 10 Hz, G = 1000 G=1 G = 10 G = 100 G = 1000 G = 10 To 0.01%, 20 V step G=1 G = 10 G = 100 G = 1000 13.0 13.0 2.5 12.0 12.0 60 60 0.1 0.1 10k 0.0007 0.005 0.005 0.005 0.010 5 10 13.8 13.5 4.0 13.8 13.5 100 120 90 120 1 165 0.1 10k 0.0007 0.005 0.005 0.007 0.015 5 15 13.8 13.5 4.0 13.8 13.5 100 120 90 120 1 165 V/V % % % % ppmC V V V V V mA mA F C
Temperature Coefficient OUTPUT RATING Output Voltage Swing
GTC VOUT
Positive Current Limit Negative Current Limit Capacitive Load Stability Thermal Shutdown Temperature NOISE Voltage Density, RTI
13.0 13.0 2.5 12.0 12.0 60 60 0.1
Noise Current Density, RTI Input Noise Voltage
5 10 59 540 0.15 0.12 0.16 1.4 13 2 570 100 82 26 4.5 12 13 15 50
5 10 59 540 0.15 0.12 0.16 1.4 13 2 570 100 82 26 4.5 12 13 15 50
nV/Hz nV/Hz nV/Hz nV/Hz pA/Hz V p-p V p-p V p-p V p-p pA p-p kHz kHz kHz kHz V/s s s s s
Input Noise Current DYNAMIC RESPONSE Small-Signal Bandwidth (-3 dB) Slew Rate Settling Time
BW SR tS
3.5
3.0
NOTES 1 Guaranteed by design. 2 Gain tempco does not include the effects of gain and scale resistor tempco match. 3 -55C TA +125C for A/B grades, -25C TA +85C for E/F grades, 0C TA 70C for G grades. Specifications subject to change without notice.
-4-
REV. D
AMP01 ELECTRICAL CHARACTERISTICS (@ V =
S
15 V, RS = 10 k , RL = 2 k , TA = +25 C, unless otherwise noted)
AMP01A/E Min Typ Max 35 50 280 65 +15 50 280 1 4.5 4.5 3.0 3.4 65 +15 AMP01B/F/G Min Typ Max 35 -10.5 35 -10.5 1 18 18 4.8 4.8 50 280 50 280 65 +15 65 +15 Units k A V k A V V/V V V mA mA
Parameter SENSE INPUT Input Resistance Input Current Voltage Range REFERENCE INPUT Input Resistance Input Current Voltage Range Gain to Output
Symbol Conditions RIN IIN
Referenced to V- (Note 1)
-10.5 35
RIN IIN
Referenced to V- (Note 1)
-10.5
POWER SUPPLY -25C TA +85C for E/F Grades, -55C TA +125C for A/B Grades +V linked to +VOP 4.5 18 Supply Voltage Range VS -V linked to -VOP 4.5 18 VS +V linked to +VOP 3.0 4.8 Quiescent Current IQ IQ -V linked to -VOP 3.4 4.8
NOTE 1 Guaranteed by design. Specifications subject to change without notice.
ORDERING GUIDE Model AMP01AX AMP01AX/883C AMP01BTC/883C AMP01BX AMP01BX/883C AMP01EX AMP01FX AMP01GBC AMP01GS AMP01GS-REEL AMP01NBC Temperature Range Package Description Package Option -55C to +125C -55C to +125C -55C to +125C -55C to +125C -55C to +125C -25C to +85C -25C to +85C 0C to +70C 0C to +70C 18-Lead Cerdip 18-Lead Cerdip 28-Terminal LCC 18-Lead Cerdip 18-Lead Cerdip 18-Lead Cerdip 18-Lead Cerdip Die 20-Lead SOIC 13" Tape and Reel Die Q-18 Q-18 E-28A Q-18 Q-18 Q-18 Q-18 R-20 R-20
5962-8863001VA* -55C to +125C 5962-88630023A* -55C to +125C 5962-8863002VA* -55C to +125C
*Standard military drawing available.
18-Lead Cerdip 28-Terminal LCC 18-Lead Cerdip
Q-18 E-28A Q-18
DICE CHARACTERISTICS
Die Size 0.111 x 0.149 inch, 16,539 sq. mils (2.82 x 3.78 mm, 10.67 sq. mm)
1. 2. 3. 4. 5. 6. 7. 8. 9.
RG RG -INPUT VOOS NULL VOOS NULL TEST PIN* SENSE REFERENCE OUTPUT
10. 11. 12. 13. 14. 15. 16. 17. 18.
V- (OUTPUT) V- V+ V+ (OUTPUT) RS RS VIOS NULL VIOS NULL +INPUT
* MAKE NO ELECTRICAL CONNECTION
REV. D
-5-
AMP01 WAFER TEST LIMITS (@ V =
S
15 V, RS = 10 k , RL = 2 k , TA = +25 C, unless otherwise noted)
AMP01NBC Limit 60 4 V+ = +5 V to +15 V G = 1000 G = 100 G = 10 G=1 V- = -5 V to -15 V G = 1000 G = 100 G = 10 G=1 Guaranteed by CMR Tests VCM = 10 V G = 1000 G = 100 G = 10 G=1 G=
20 x RS RG
Parameter Input Offset Voltage Output Offset Voltage Offset Referred to Input vs. Positive Supply
Symbol Conditions VIOS VOOS PSR
AMP01GBC Limit 120 8 110 100 90 70 105 90 70 50 8 3 10 115 110 95 75 0.8 13 13 2.5 60 120 4.8 4.8
Units V max mV max dB min dB min dB min dB min dB min dB min dB min dB min dB min dB min nA max nA max V min dB min dB min dB min dB min dB min % max V min V min V min mA min mA max mA max mA max
120 110 95 75 105 90 70 50 4 1 10 125 120 100 85 0.6 13 13 2.5 60 120 4.8 4.8
Offset Referred to Input vs. Negative Supply
PSR
Input Bias Current Input Offset Current Input Voltage Range Common Mode Rejection
IB IOS IVR CMR
Gain Equation Accuracy Output Voltage Swing Output Current Limit Output Current Limit Quiescent Current VOUT VOUT VOUT IQ
RL = 2 k RL = 500 RL = 50 Output to Ground Short Output to Ground Short +V Linked to +VOP -V Linked to -VOP
NOTE Electrical tests are performed at wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not guaranteed for standard product dice. Consult factory to negotiate specifications based on dice lot qualification through sample lot assembly and testing.
V+ VIOS NULL A1 250 -IN +IN REFERENCE R1 47.5k RGAIN A2 RSCALE R2 2.5k VOOS NULL R4 2.5k V- A3 R3 47.5k 250 Q1 Q2 +VOP OUTPUT -VOP
SENSE
Figure 1. Simplified Schematic
CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AMP01 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
-6-
REV. D
AMP01 ELECTRICAL CHARACTERISTICS (@ V =
S
15 V, RS = 10 k , RL = 2 k , TA = +25 C, unless otherwise noted)
AMP01NBC Typical 0.15 20 40 3 0.0007 5 0.15 0.12 2 26 4.5 50 AMP01GBC Typical 0.30 50 50 5 0.0007 5 0.15 0.12 2 26 4.5 50 Units V/C V/C pA/C pA/C % nV/Hz pA/Hz V p-p pA p-p kHz V/s s
Parameter Input Offset Voltage Drift Output Offset Voltage Drift Input Bias Current Drift Input Offset Current Drift Nonlinearity Voltage Noise Density Current Noise Density Voltage Noise Current Noise
Symbol TCVIOS TCVOOS TCIB TCIOS en in en p-p in p-p
Conditions RG = G = 1000 G = 1000 fO = 1 kHz G = 1000 fO = 1 kHz G = 1000 0.1 Hz to 10 Hz G = 1000 0.1 Hz to 10 Hz G = 1000 G = 10 To 0.01%, 20 V Step G = 1000
Small-Signal Bandwidth (-3 dB) BW Slew Rate SR Settling Time tS
NOTE Electrical tests are performed at wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not guaranteed for standard product dice. Consult factory to negotiate specifications based on dice lot qualification through sample lot assembly and testing.
REV. D
-7-
AMP01-Typical Performance Characteristics
50 INPUT OFFSET VOLTAGE - V INPUT OFFSET VOLTAGE - V 40 30 20 10 0 -10 -20 -30 -40 -75 -50 -25 0 25 50 75 100 125 150 TEMPERATURE - C VS = 15V 6 4 2 0 -2 -4 -6 3 4 UNIT NO. 1 2 8 TA = +25 C OUTPUT OFFSET VOLTAGE - mV 5 4 3 2 1 0 -1 -2 -3 -4 0 5 10 15 POWER SUPPLY VOLTAGE - Volts 20 -5 -75 -50 -25 0 25 50 75 100 125 150 TEMPERATURE - C VS = 15V
Figure 2. Input Offset Voltage vs. Temperature
Figure 3. Input Offset Voltage vs. Supply Voltage
Figure 4. Output Offset Voltage vs. Temperature
OUTPUT OFFSET VOLTAGE CHANGE - mV
2.5 TA = +25 C 2.0 INPUT BIAS CURRENT - nA 1.5 1.0 0.5 0 -0.5 -1.0
5 VS = 4 3 2 1 0 -1 -2 -75 -50 -25 0 25 50 75 100 125 150 TEMPERATURE - C INPUT BIAS CURRENT - nA 15V
2.0 TA = +25 C 1.5 1.0 0.5 0 -0.5 -1.0 -1.5
0
5 10 15 20 POWER SUPPLY VOLTAGE - Volts
25
0
5 10 15 POWER SUPPLY VOLTAGE - Volts
20
Figure 5. Output Offset Voltage Change vs. Supply Voltage
Figure 6. Input Bias Current vs. Temperature
Figure 7. Input Bias Current vs. Supply Voltage
0.8 VS = INPUT OFFSET CURRENT - nA 0.6 0.4 0.2 0.0 -0.2 -0.4 -0.6 -75 -50 -25 0 25 50 75 100 125 150 TEMPERATURE - C 15V COMMON-MODE REJECTION - dB
140 COMMON-MODE REJECTION - dB VS = 15V TA = +25 C 130
140 G = 1000 120 G = 100 100 80 60 40 20 0 1 10 100 1k VOLTAGE GAIN - G 10k 1 10 100 1k FREQUENCY - Hz 10k 100k VCM = 2V p-p VS = 15V TA = +25 C
120
G = 10
G=1
110
100
Figure 8. Input Offset Current vs. Temperature
Figure 9. Common-Mode Rejection vs. Voltage Gain
Figure 10. Common-Mode Rejection vs. Frequency
-8-
REV. D
AMP01
COMMON-MODE INPUT VOLTAGE - Volts 16 VDM = 0 14 12 10 8 6 4 2 0 25 50 75 100 125 150 -75 -50 -25 0 TEMPERATURE - C VS = 5V VS = 10V VS = 15V POWER SUPPLY REJECTION - dB 120 100 80 60 40 G = 10 20 G=1 0 1 10 100 1k FREQUENCY - Hz 10k 100k 0 1 10 100 1k FREQUENCY - Hz 10k 100k 140 G = 1000 140 POWER SUPPLY REJECTION - dB VS = 15V TA = +25 C VS = 1V G = 100 120 100 80 60 40 20 VS = 15V TA = +25 C VS = 1V G = 1000 G = 100 G = 10 G=1
Figure 11. Common-Mode Voltage Range vs. Temperature
Figure 12. Positive PSR vs. Frequency
Figure 13. Negative PSR vs. Frequency
18 16 OUITPUT VOLTAGE - Volts 14 12 10 8 6 4 2 0 10 100 1k LOAD RESISTANCE - 10k PEAK-TO-PEAK AMPLITUDE - Volts VS = 15V
30 25
100 VS = 15V RL = 2k 10 OUTPUT IMPEDANCE - G = 1000 1.0 G=1 0.1 VS = 15V IOUT = 20mA p-p
20
15
10 5
0.01
0 100
1k
10k 100k FREQUENCY - Hz
1M
0.001 10
100
1k 10k 100k FREQUENCY - Hz
1M
Figure 14. Maximum Output Voltage vs. Load Resistance
Figure 15. Maximum Output Swing vs. Frequency
Figure 16. Closed-Loop Output Impedance vs. Frequency
80 G = 1000 60 VOLTAGE GAIN - dB G = 100
0.08 TOTAL HARMONIC DISTORTION - % 0.07 0.06 0.05 G = 1000 0.04 0.03 0.02 0.01 0 10 G = 100 G=1 G = 10 TOTAL HARMONIC DISTORTION - % VS = 15V TA = +25 C VS = 15V RL = 600 VOUT = 20V p-p
0.02 VS = 15V G = 100 f = 1kHz VOUT = 20V p-p
40
20
G = 10 G=1
0.01
0 -20
-40 1 10 100 1k 10k FREQUENCY - Hz 100k 1M
100 1k FREQUENCY - Hz
10k
0 100
1k LOAD RESISTANCE -
10k
Figure 17. Closed-Loop Voltage Gain vs. Frequency
Figure 18. Total Harmonic Distortion vs. Frequency
Figure 19. Total Harmonic Distortion vs. Load Resistance
REV. D
-9-
AMP01
6 VS = 5 SLEW RATE - V/ s SLEW RATE - V/ s 15V 5 SETTLING TIME - s 6 VS = 15V 60 70 VS = 15V 20V STEP
4
4
50
3 2
3
40 30
2 1
1
20
0 1 10 100 VOLTAGE GAIN - G 1k
0 100p
10 1n 10n 100n LOAD CAPACITANCE - F 1 1 10 100 VOLTAGE GAIN - G 1k
Figure 20. Slew Rate vs. Voltage Gain
Figure 21. Slew Rate vs. Load Capacitance
Figure 22. Settling Time to 0.01% vs. Voltage Gain
15 G = 1000 VOLTAGE NOISE - nV/ Hz VOLTAGE NOISE - nV/ Hz
1k POSITIVE SUPPLY CURRENT - mA VS = 15V f = 1kHz
8 TA = +25 C 7 6 5 4 3 2 1 0 1 10 100 VOLTAGE GAIN - G 1k 0
10
100
5
10
0 1
10
100 1k FREQUENCY - Hz
10k
1
5 10 15 POWER SUPPLY VOLTAGE - Volts
20
Figure 23. Voltage Noise Density vs. Frequency
Figure 24. RTI Voltage Noise Density vs. Gain
Figure 25. Positive Supply Current vs. Supply Voltage
-8 NEGATIVE SUPPLY CURRENT - mA -7 -6 -5 -4 -3 -2 -1 0 0 POSITIVE SUPPLY CURRENT - mA TA = +25 C
6 NEGATIVE SUPPLY CURRENT - mA VS = 5 15V
-6 VS = 15V VSENSE = VREF = 0V
-5
4
-4
3
-3
2
-2
1 0 -75 -50 -25
-1 0 -75 -50 -25
5 10 15 POWER SUPPLY VOLTAGE - Volts
20
0 25 50 75 100 125 150 TEMPERATURE - C
0 25 50 75 100 125 150 TEMPERATURE - C
Figure 26. Negative Supply Current vs. Supply Voltage
Figure 27. Positive Supply Current vs. Temperature
Figure 28. Negative Supply Current vs. Temperature
-10-
REV. D
AMP01
INPUT AND OUTPUT OFFSET VOLTAGES GAIN
Instrumentation amplifiers have independent offset voltages associated with the input and output stages. While the initial offsets may be adjusted to zero, temperature variations will cause shifts in offsets. Systems with auto-zero can correct for offset errors, so initial adjustment would be unnecessary. However, many high-gain applications don't have auto zero. For these applications, both offsets can be nulled, which has minimal effect on TCVIOS and TCVOOS The input offset component is directly multiplied by the amplifier gain, whereas output offset is independent of gain. Therefore, at low gain, output-offset errors dominate, while at high gain, input-offset errors dominate. Overall offset voltage, VOS, referred to the output (RTO) is calculated as follows; VOS (RTO) = (VIOS x G) + VOOS (1) where VIOS and VOOS are the input and output offset voltage specifications and G is the amplifier gain. Input offset nulling alone is recommended with amplifiers having fixed gain above 50. Output offset nulling alone is recommended when gain is fixed at 50 or below. In applications requiring both initial offsets to be nulled, the input offset is nulled first by short-circuiting RG, then the output offset is nulled with the short removed. The overall offset voltage drift TCVOS, referred to the output, is a combination of input and output drift specifications. Input offset voltage drift is multiplied by the amplifier gain, G, and summed with the output offset drift; TCVOS (RTO) = (TCV IOS x G) + TCVOOS (2) where TCVIOS is the input offset voltage drift, and TCVOOS is the output offset voltage specification. Frequently, the amplifier drift is referred back to the input (RTI), which is then equivalent to an input signal change; TCVOS (RTI) = TCVIOS
TCV OOS G
The AMP01 uses two external resistors for setting voltage gain over the range 0.1 to 10,000. The magnitudes of the scale resistor, RS, and gain-set resistor, RG, are related by the formula: G = 20 x RS/RG, where G is the selected voltage gain (refer to Figure 29).
V+ RS 14 +IN 18 1 RG 2 3 15 13 12 7 SENSE
AMP01
10
9 OUTPUT
8 11 REFERENCE
-IN
VOLTAGE GAIN, G =
(20 R R )
S G
V-
Figure 29. Basic AMP01 Connections for Gains 0.1 to 10,000
(3)
For example, the maximum input-referred drift of an AMP01 EX set to G = 1000 becomes; TCVOS (RTI ) = 0.3 V/C +
100 V /C = 0.4 V/C max 1000
The magnitude of RS affects linearity and output referred errors. Circuit performance is characterized using RS = 10 k when operating on 15 volt supplies and driving a 10 volt output. RS may be reduced to 5 k in many applications particularly when operating on 5 volt supplies or if the output voltage swing is limited to 5 volts. Bandwidth is improved with RS = 5 k and this also increases common-mode rejection by approximately 6 dB at low gain. Lowering the value below 5 k can cause instability in some circuit configurations and usually has no advantage. High voltage gains between two and ten thousand would require very low values of RG. For RS = 10 k and AV = 2000 we get RG = 100 ; this value is the practical lower limit for RG. Below 100 , mismatch of wirebond and resistor temperature coefficients will introduce significant gain tempco errors. Therefore, for gains above 2,000, RG should be kept constant at 100 and RS increased. The maximum gain of 10,000 is obtained with RS set to 50 k. Metal-film or wirewound resistors are recommended for best results. The absolute values and TCs are not too important, only the ratiometric parameters. AC amplifiers require good gain stability with temperature and time, but dc performance is unimportant. Therefore, low cost metal-film types with TCs of 50 ppm/C are usually adequate for RS and R G. Realizing the full potential of the AMP01's offset voltage and gain stability requires precision metal-film or wirewound resistors. Achieving a 15 ppm/C gain tempco at all gains requires RS and RG temperature coefficient matching to 5 ppm/C or better.
INPUT BIAS AND OFFSET CURRENTS
Input transistor bias currents are additional error sources that can degrade the input signal. Bias currents flowing through the signal source resistance appear as an additional offset voltage. Equal source resistance on both inputs of an IA will minimize offset changes due to bias current variations with signal voltage and temperature. However, the difference between the two bias currents, the input offset current, produces a nontrimmable error. The magnitude of the error is the offset current times the source resistance. A current path must always be provided between the differential inputs and analog ground to ensure correct amplifier operation. Floating inputs, such as thermocouples, should be grounded close to the signal source for best common-mode rejection.
REV. D
-11-
AMP01
1M VS = 15V
100k RESISTANCE -
IVR is the data sheet specification for input voltage range; VOUT is the maximum output signal; G is the chosen voltage gain. For example, at +25C, IVR is specified as 10.5 volt minimum with 15 volt supplies. Using a 10 volt maximum swing output and substituting the figures in (4) simplifies the formula to: CMVR = 10.5 - G For all gains greater than or equal to 10, CMVR is 10 volt minimum; at gains below 10, CMVR is reduced.
ACTIVE GUARD DRIVE
RS 10k
5
(5)
RG 1k
100 1 10 100 VOLTAGE GAIN 1k 10k
Figure 30. RG and RS Selection Gain accuracy is determined by the ratio accuracy of RS and RG combined with the gain equation error of the AMP01 (0.6% max for A/E grades).
All instrumentation amplifiers require attention to layout so thermocouple effects are minimized. Thermocouples formed between copper and dissimilar metals can easily destroy the TCVOS performance of the AMP01 which is typically 0.15 V/C. Resistors themselves can generate thermoelectric EMF's when mounted parallel to a thermal gradient. "Vishay" resistors are recommended because a maximum value for thermoelectric generation is specified. However, where thermal gradients are low and gain TCs of 20 ppm-50 ppm are sufficient, general-purpose metal-film resistors can be used for RG and RS.
COMMON-MODE REJECTION
Rejection of common-mode noise and line pick-up can be improved by using shielded cable between the signal source and the IA. Shielding reduces pick-up, but increases input capacitance, which in turn degrades the settling-time for signal changes. Further, any imbalance in the source resistance between the inverting and noninverting inputs, when capacitively loaded, converts the common-mode voltage into a differential voltage. This effect reduces the benefits of shielding. AC common-mode rejection is improved by "bootstrapping" the input cable capacitance to the input signal, a technique called "guard driving." This technique effectively reduces the input capacitance. A single guard-driving signal is adequate at gains above 100 and should be the average value of the two inputs. The value of external gain resistor RG is split between two resistors RG1 and RG2; the center tap provides the required signal to drive the buffer amplifier (Figure 31).
GROUNDING
Ideally, an instrumentation amplifier responds only to the difference between the two input signals and rejects commonmode voltages and noise. In practice, there is a small change in output voltage when both inputs experience the same commonmode voltage change; the ratio of these voltages is called the common-mode gain. Common-mode rejection (CMR) is the logarithm of the ratio of differential-mode gain to commonmode gain, expressed in dB. CMR specifications are normally measured with a full-range input voltage change and a specified source resistance unbalance. The current-feedback design used in the AMP01 inherently yields high common-mode rejection. Unlike resistive feedback designs, typified by the three-op-amp IA, the CMR is not degraded by small resistances in series with the reference input. A slight, but trimmable, output offset voltage change results from resistance in series with the reference input. The common-mode input voltage range, CMVR, for linear operation may be calculated from the formula: | OUT| V CMVR = IVR - 2G
The majority of instruments and data acquisition systems have separate grounds for analog and digital signals. Analog ground may also be divided into two or more grounds which will be tied together at one point, usually the analog power-supply ground. In addition, the digital and analog grounds may be joined, normally at the analog ground pin on the A-to-D converter. Following this basic grounding practice is essential for good circuit performance (Figure 32). Mixing grounds causes interactions between digital circuits and the analog signals. Since the ground returns have finite resistance and inductance, hundreds of millivolts can be developed between the system ground and the data acquisition components. Using separate ground returns minimizes the current flow in the sensitive analog return path to the system ground point. Consequently, noisy ground currents from logic gates do not interact with the analog signals. Inevitably, two or more circuits will be joined together with their grounds at differential potentials. In these situations, the differential input of an instrumentation amplifier, with its high CMR, can accurately transfer analog information from one circuit to another.
SENSE AND REFERENCE TERMINALS
(4)
The sense terminal completes the feedback path for the instrumentation amplifier output stage and is normally connected directly to the output. The output signal is specified with respect to the reference terminal, which is normally connected to analog ground.
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AMP01
C3 0.047 F RS 10k 15 +IN +15V 7 GUARD DRIVE 6 741 3 4 -15V -IN 3 2 RG3 200 RG2 200 RG1 400 1 18 RS 14 RS 6 13 12 RG V+ 7 9 8 R5 OUTPUT SENSE NC +15V
VOLTAGE GAIN, G =
(20R R )
S G1
*
R4 C1 0.047 F + C5 10 F
AV = 500 WITH COMPONENTS SHOWN
*
AMP01
2 RG VIOS NULL 16 VOOS NULL 4 17 10 5
V- 11
* *SOLDER LINK
R2 1M
R1 1M
*
VR1 100k REFERENCE R3
VR2 100k
*
SIGNAL GROUND C4 0.047 F GROUND + C6 10 F C2 0.047 F
-15V
Figure 31. AMP01 Evaluation Circuit Showing Guard-Drive Connection
ANALOG POWER SUPPLY +15V 0V -15V 0V
DIGITAL POWER SUPPLY +5V
4.7 F + C C C C DIGITAL GROUND C C C
7
AMP01
8
9
ANALOG GROUND SMP-11 SAMPLE AND HOLD
DIGITAL GROUND ADC
DIGITAL DATA OUTPUT
OUTPUT REFERENCE
HOLD CAPACITOR
C = 0.047 F CERAMIC CAPACITORS
Figure 32. Basic Grounding Practice
REV. D
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AMP01
If heavy output currents are expected and the load is situated some distance from the amplifier, voltage drops due to track or wire resistance will cause errors. Voltage drops are particularly troublesome when driving 50 loads. Under these conditions, the sense and reference terminals can be used to "remote sense" the load as shown in Figure 33. This method of connection puts the IxR drops inside the feedback loop and virtually eliminates the error. An unbalance in the lead resistances from the sense and reference pins does not degrade CMR, but will change the output offset voltage. For example, a large unbalance of 3 will change the output offset by only 1 mV.
DRIVING 50 LOADS
combination of these unique features in an instrumentation amplifier allows low-level transducer signals to be conditioned and directly transmitted through long cables in voltage or current form. Increased output current brings increased internal dissipation, especially with 50 loads. For this reason, the power-supply connections are split into two pairs; pins 10 and 13 connect to the output stage only and pins 11 and 12 provide power to the input and following stages. Dual supply pins allow dropper resistors to be connected in series with the output stage so excess power is dissipated outside the package. Additional decoupling is necessary between pins 10 and 13 to ground to maintain stability when dropper resistors are used. Figure 34 shows a complete circuit for driving 50 loads.
Output currents of 50 mA are guaranteed into loads of up to 50 and 26 mA into 500 . In addition, the output is stable and free from oscillation even with a high load capacitance. The
V+ RS 14 +IN 18 1 15 12 13 7 RG 2 3 11
* IN4148 DIODES ARE OPTIONAL. DIODES LIMIT THE OUTPUT
VOLTAGE EXCURSION IF SENSE AND/OR REFERENCE LINES BECOME DISCONNECTED FROM THE LOAD. SENSE
*
9 TWISTED PAIRS REMOTE LOAD
AMP01
10
8 REFERENCE
-IN
*
OUTPUT GROUND V-
Figure 33. Remote Load Sensing
POWER BANDWIDTH, G = 100, 130kHz POWER BANDWIDTH, G = 10, 200kHz T.H.D.~0.04% @ 1kHz, 2Vrms
+15V RS 5k 14 R1 130 1W C1 0.047 F 15 12 SENSE 0.047 F
+IN
18
1
13 7 9 8 10 11 REFERENCE C2 0.047 F R2 130 1W VOUT 3V MAX 50 LOAD
RG 2
AMP01
-IN
3
0.047 F -15V
VOLTAGE GAIN, G =
(
20
RS RG
)
Figure 34. Driving 50 Loads
RESISTERS R1 AND R2 REDUCE IC DISSIPATION
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REV. D
AMP01
HEATSINKING
To maintain high reliability, the die temperature of any IC should be kept as low as practicable, preferably below 100C. Although most AMP01 application circuits will produce very little internal heat -- little more than the quiescent dissipation of 90 mW--some circuits will raise that to several hundred milliwatts (for example, the 4-20 mA current transmitter application, Figure 37). Excessive dissipation will cause thermal shutdown of the output stage thus protecting the device from damage. A heatsink is recommended in power applications to reduce the die temperature. Several appropriate heatsinks are available; the Thermalloy 6010B is especially easy to use and is inexpensive. Intended for dual-in-line packages, the heatsink may be attached with a cyanoacrylate adhesive. This heatsink reduces the thermal resistance between the junction and ambient environment to approximately 80C/W. Junction (die) temperature can then be calculated by using the relationship: Pd = TJ - TA JA
External series resistors could be added to guard against higher voltage levels at the input, but resistors alone increase the input noise and degrade the signal-to-noise ratio, especially at high gains. Protection can also be achieved by connecting back-to-back 9.1 V Zener diodes across the differential inputs. This technique does not affect the input noise level and can be used down to a gain of 2 with minimal increase in input current. Although voltage-clamping elements look like short circuits at the limiting voltage, the majority of signal sources provide less than 50 mA, producing power levels that are easily handled by low-power Zeners. Simultaneous connection of the differential inputs to a low impedance signal above 10 V during normal circuit operation is unlikely. However, additional protection involves adding 100 current-limiting resistors in each signal path prior to the voltage clamp, the resistors increase the input noise level to just 5.4 nV/Hz (refer to Figure 35). Input components, whether multiplexers or resistors, should be carefully selected to prevent the formation of thermocouple junctions that would degrade the input signal.
* OPTIONAL PROTECTION
RESISTORS, SEE TEXT. 100 1W* +IN 9.1V 1W ZENERS 100 1W* +15V LINEAR INPUT RANGE, 5V MAXIMUM DIFFERENTIAL PROTECTION TO 30V
where TJ and TA are the junction and ambient temperatures respectively, JA is the thermal resistance from junction to ambient, and Pd is the device's internal dissipation.
OVERVOLTAGE PROTECTION
Instrumentation amplifiers invariably sit at the front end of instrumentation systems where there is a high probability of exposure to overloads. Voltage transients, failure of a transducer, or removal of the amplifier power supply while the signal source is connected may destroy or degrade the performance of an unprotected amplifier. Although it is impractical to protect an IC internally against connection to power lines, it is relatively easy to provide protection against typical system overloads. The AMP01 is internally protected against overloads for gains of up to 100. At higher gains, the protection is reduced and some external measures may be required. Limited internal overload protection is used so that noise performance would not be significantly degraded. AMP01 noise level approaches the theoretical noise floor of the input stage which would be 4 nV/Hz at 1 kHz when the gain is set at 1000. Noise is the result of shot noise in the input devices and Johnson noise in the resistors. Resistor noise is calculated from the values of RG (200 at a gain of 1000) and the input protection resistors (250 ). Active loads for the input transistors contribute less than 1 nV/Hz of noise. The measured noise level is typically 5 nV/Hz. Diodes across the input transistor's base-emitter junctions, combined with 250 input resistors and RG, protect against differential inputs of up to 20 V for gains of up to 100. The diodes also prevent avalanche breakdown that would degrade the IB and IOS specifications. Decreasing the value of RG for gains above 100 limits the maximum input overload protection to 10 V.
AMP01
VOUT
-IN
-15V
Figure 35. Input Overvoltage Protection for Gains 2 to 10,000
POWER SUPPLY CONSIDERATIONS
Achieving the rated performance of precision amplifiers in a practical circuit requires careful attention to external influences. For example, supply noise and changes in the nominal voltage directly affect the input offset voltage. A PSR of 80 dB means that a change of 100 mV on the supply, not an uncommon value, will produce a 10 V input offset change. Consequently, care should be taken in choosing a power unit that has a low output noise level, good line and load regulation, and good temperature stability.
REV. D
-15-
AMP01
+15V COMPLIANCE, TYPICALLY 10V LINEARITY ~0.01% OUTPUT RESISTANCE AT 20mA ~5M POWER BANDWIDTH (-3dB) ~60kHz INTO 500 LOAD 0.047 F +IN 18 12 V+ 1 RG 2k 2 RG V- -IN 3 RS 14 RS 2k -15V RS 15 11 IOUT = VIN 0.047 F 20
G
ROUT TRIM 13 SENSE 7 9 8 10 REFERENCE R2 200 R1 100
RG
VIN
AMP01
IOUT
(R
RS R1
)
R1 = 100 FOR IOUT = 20mA VIN = 100mV FOR 20mA FULL SCALE
Figure 36. High Compliance Bipolar Current Source with 13-Bit Linearity
ALL RESISTORS 1% METAL FILM RS 2k 14 RS RS 1 RG 2.75k 2 RG V- 11 -IN 0V 0.047 F 3 R4 100 R6 500 ZERO TRIM R1 100 IOUT 4mA TO 20mA +15V TO +30V 0.047 F
+IN
18
15 12 V+ 13 R3 100 7 R2 200 ROUT TRIM 2 4 REF-02 6
RG
AMP01
8 10
9 R5 2.21k
-5V COMPLIANCE OF IOUT, +20V WITH +30V SUPPLY (OUTPUT w.r.t. 0V) DIFFERENTIAL INPUT OF 100mV FOR 16mA SPAN OUTPUT RESISTANCE ~5M AT IOUT = 20mA LINEARITY 0.01% OF SPAN
Figure 37. 13-Bit Linear 4-20 mA Transmitter Constructed by Adding a Voltage Reference. Thermocouple Signals Can Be Accepted Without Preamplification.
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REV. D
AMP01
+15V + 0.047 F 10 F
10k 14 +IN 18 RS 15 RS 2N4921 12 V+ 0.047 F SENSE 7 9 8 REFERENCE V- -IN 3 11 2N4918 GND VOLTAGE GAIN, G = 100 POWER BANDWIDTH (-3dB), 60kHz QUIESCENT CURRENT, 4mA LINEARITY~0.01% @ FULL OUTPUT INTO 10 0.047 F + 10
1
13
RG
RG 2 RG
AMP01
100
VOUT ( 10V INTO 10 )
-15V
Figure 38. Adding Two Transistors Increases Output Current to 1 A Without Affecting the Quiescent Current of 4 mA. Power Bandwidth is 60 kHz.
Q1, Q2...........J110 Q3, Q4, Q5....J107 IC1 ...............CMP-04 IC2 ...............OP15GZ +IN -IN 200k 47k 47k Q3 47k 47k +15V 6 7 IC2 4 -15V 3 4 6 8 10 2.7k
+ + + +
RS 10k 18 1 RG
+15V
14 RS 15 RS 12 V+ 13
0.047 F
20k
2k
196 Q4 Q5
SENSE 7 9
AMP01
VOOS NULL RG VIOS NULL 17 16 4 11 5
Q2 Q1 2 3
V- 10
OUT
8 REFERENCE GND
3 2 2 1 14 13
0.047 F 100k 100k
IC1 12
LINEARITY~0.005%, G = 10 AND 100 ~0.02%, G = 1 AND 1000 GAIN ACCURACY, UNTRIMMED~0.5%
27k +15V
5 G1
7 G10
9 G100
11 G1000
-15V
SETTLING TIME TO 0.01%, ALL GAINS, LESS THAN 75 s GAIN SWITCHING TIME, LESS THAN 100 s
TTL COMPATIBLE INPUTS
Figure 39. The AMP01 Makes an Excellent Programmable-Gain Instrumentation Amplifier. Combined Gain-Switching and Settling Time to 13 Bits Falls Below 100 s. Linearity Is Better than 12 Bits over a Gain Range 1 to 1000.
REV. D
-17-
AMP01
RS 10k 14 +IN 18 RS 15 RS 1 12 V+ 1.5k *5k 470pF 3 4 7 OP37 6 +15V 0.047 F 0V
*MATCHED TO 0.1%
*5k
13
RG
SENSE 7 9 8
RG 2 RG
AMP01
V- 11 10
2
REFERENCE
-IN
3 0.047 F 0V
VOLTAGE GAIN, G =
(
20
RS RG
)
-15V RL + OUTPUT DIFFERENTIAL COMMON-MODE OUTPUT REFERENCE ( 5V MAX)
MAXIMUM OUTPUT, 20V p-p INTO 600 T.H.D. 0.01% @ 1kHz, 20V p-p INTO 600 , G = 10
Figure 40. A Differential Input Instrumentation Amplifier with Differential Output Replaces a Transformer in Many Applications. The Output will Drive a 600 Load at Low Distortion, (0.01%).
+15V
POWER BANDWIDTH (-3dB)~150kHz + 0.047 F 10 F TOTAL HARMONIC DISTORTION~0.006% @1kHz, 20V p-p INTO 500 // 1000pF
8 18 VIN 1 R1 390 2 RG RS RS 14 15 V- 11 RG REF 7 SENSE 12 V+
13
AMP01
10
9
VOUT
3
R2 4.95k 0.047 F +
CL
RL
10 F
NC
NC
-15V R3 50 VOLTAGE GAIN, G = 1 +
CLOSED-LOOP VOLTAGE GAIN MUST BE GREATER THAN 50 FOR STABLE OPERATION NC = NO CONNECT
(
R2 R3
)
Figure 41. Configuring the AMP01 as a Noninverting Operational Amplifier Provides Exceptional Performance. The Output Handles Low Load Impedances at Very Low Distortion, 0.006%.
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REV. D
AMP01
NC NC R2 220k
R1 VIN 0.01 F
3
14 RS
15 RS
7 SENSE 8 REF 9 VOUT
2
RG
4.7k
R4 1 RG
AMP01
V- 11 10
20V p-p INTO 500
// 1000pF.
R3
18 13
V- 12
TOTAL HARMONIC DISTORTION: <0.005% @ 1kHz, VOUT = 20V p-p G = 1 TO 1000
R1 =
R2 GAIN (G) + 10 F 0.047 F + +15V -15V 10 F 0.047 F
R3 = R1 // R2 R4 = 1.5k @ G = 1 1.2k @ G = 10 120 @ G = 100 AND 1000
Figure 42. The Inverting Operational Amplifier Configuration has Excellent Linearity over the Gain Range 1 to 1000, Typically 0.005%. Offset Voltage Drift at Unity Gain Is Improved over the Drift in the Instrumentation Amplifier Configuration.
+15V R1 4.7k VIN 0.01 F 1 R3 330 RG 3k 2 RG RS RS 14 NC 15 0.047 F NC + -15V 10 F V- 11 RG 680pF 18 8 REF 7 SENSE 12 V+ 0.047 F + 10 F POWER BANDWIDTH (-3dB)~60kHz 13 TOTAL HARMONIC DISTORTION~0.001% @1kHz, 20V p-p INTO 500 // 1000pF NC = NO CONNECT 9 VOUT
AMP01
10
CL R2 4.7k
RL
3
Figure 43. Stability with Large Capacitive Loads Combined with High Output Current Capability make the AMP01 Ideal for Line Driving Applications. Offset Voltage Drift Approaches the TCVIOS Limit, (0.3 V/ C).
REV. D
-19-
AMP01
V+ V- 16.2k 1F 18 1R G RG 200k 20k 2k 200 13 12 11 10 7 G10 G1 G1000 2 3 G100 RG RS RG RS 14 10k en (G = 1, 10, 100) = eOUT 1000 G G1000 G1,10,100 100 1k 1F 6 15 16.2k 1.82k 3 9 8 8 1.62M 5 2
- 1/2 OP215 + 8 V+ V- 1F 7 9.09k 4 1 OUTPUT
AMP01
+ 1/2 OP215 -
en (G = 1000) =
eOUT 100 G
Figure 44. Noise Test Circuit (0.1 Hz to 10 Hz)
VIN 20V p-p 10k 0.1% G10 G1
200 10T
1.91k 0.1% VOUT 2 HSCH-1001 10k 0.1% 14 RS 2k 0.1%
3 G100 1.1k 0.1% G1000 1R G RG 10 0.1% 200k 0.1% 20k 0.1% G10 2k 0.1% G100 G1000 2 18 RG 200 0.1%
102 0.1%
15 RS
7 9 8 8
AMP01
10 RG 12 13 11
G1
0.047 F V+ V-
0.047 F
Figure 45. Settling-Time Test Circuit
-20-
REV. D
AMP01
+15V RS 10k 11 +IN 16 1 3 -IN 9 DG390 10 15 ANALOG SWITCH RG 200 2 4 5 6 8 3 RG 1 RG 18 15 RS 14 RS 12 V+ 13 SENSE 7 9 8 V- 11 15k 13 4 DAC-08 1, 2 16 3 0.047 F R1 100 0.01 F 7.5k TTL INPUT "OFFSET" 0V TTL INPUT "ZERO" -15V 15 14 10 REFERENCE 7.5k VOLTAGE GAIN, G = 0.047 F
(20 R R )
S G
AMP01
VOUT
14
13
1mA
Figure 46. Instrumentation Amplifier with Autozero
+18V 10k 0.047 F 14 18 1 10k 2 3 RG 11 0.047 F -18V RG RS 15 12 RS SENSE 13 7 9 8 10 VOUT
AMP01
Figure 47. Burn-In Circuit
REV. D
-21-
AMP01
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
18-Lead Cerdip (Q-18)
0.005 (0.13) MIN
18
0.098 (2.49) MAX
10
0.310 (7.87) 0.220 (5.59)
1 9
PIN 1 0.960 (24.38) MAX 0.200 (5.08) MAX 0.200 (5.08) 0.125 (3.18) 0.023 (0.58) 0.014 (0.36) 0.060 (1.52) 0.015 (0.38) 0.150 (3.81) MIN 0.100 (2.54) BSC 0.070 (1.78) SEATING 0.030 (0.76) PLANE 15 0
0.320 (8.13) 0.290 (7.37)
0.015 (0.38) 0.008 (0.20)
28-Terminal Ceramic Leadless Chip Carrier (E-28A)
0.075 (1.91) REF 0.095 (2.41) 0.075 (1.90) 0.011 (0.28) 0.007 (0.18) R TYP 0.075 (1.91) REF 0.088 (2.24) 0.054 (1.37)
19 18 26 25
0.100 (2.54) 0.064 (1.63)
0.300 (7.62) BSC 0.150 (3.51) BSC
4 28 1 5
0.015 (0.38) MIN 0.028 (0.71) 0.022 (0.56) 0.050 (1.27) BSC 45 TYP
0.458 (11.63) 0.442 (11.23) 0.458 SQ (11.63) MAX SQ
BOTTOM VIEW
12 11
0.055 (1.40) 0.045 (1.14)
0.200 (5.08) BSC
20-Lead SOIC (R-20)
0.5118 (13.00) 0.4961 (12.60)
20 11
0.4193 (10.65) 0.3937 (10.00)
0.2992 (7.60) 0.2914 (7.40)
1
10
PIN 1
0.1043 (2.65) 0.0926 (2.35)
0.0291 (0.74) 0.0098 (0.25)
45
0.0118 (0.30) 0.0040 (0.10)
8 0.0500 0.0192 (0.49) 0 (1.27) 0.0138 (0.35) SEATING 0.0125 (0.32) PLANE BSC 0.0091 (0.23)
0.0500 (1.27) 0.0157 (0.40)
-22-
REV. D
PRINTED IN U.S.A.
C3103b-0-12/99

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